Architecting Our Way Up the Quantum Ladder:
From NISQ to Fault-Tolerant Quantum Computers

Invited seminar talk at NC State, March 22, 2019

Slides

Abstract:

Today’s quantum computing hardware is becoming large and reliable enough to perform small useful computational tasks. Further advancement would bring us closer to building a practical quantum computer that can solve problems thought to be intractable on today’s high-performance digital computers. As we continue to improve technologies and offer devices with growing number of qubits and increasingly precise controls, near-term devices will inevitably be constrained in size and limited in fidelity, while most known classically intractable problems have large scale and require high precision. It is therefore paramount to find problems and develop solutions that are suitable for Noisy Intermediate-Scale Quantum (NISQ) devices, as well as to use them as a guide for scaling up to practical-scale quantum computers. There will be tremendous opportunities for systems research in face of the challenges, as many systems techniques for classical computers are designed to efficiently accommodate program demands to hardware resource constraints.

One of the biggest challenges in building scalable fault-tolerant quantum computers is the creation and distribution of special logical qubit resources for error correction, called magic states. The resources required by the creation (a.k.a. distillation) of magic states are overwhelming for today’s machines. In existing approaches, the mapping and scheduling of the distillation circuits are typically ambiguous. Our methodology, exploiting the underlying hierarchical structure of the circuits, can bring down the distillation cost by 80% by using system techniques such as graph partitioning, force-directed annealing, and register renaming. Managing the movements and distributions of magic states in the computation can further cut down the overall cost by 90%.

The road to enabling practical-scale quantum computing does not end with the design of a more efficient error-correction circuit. In order to achieve the desired 100x to 1000x efficiency needed by fault tolerance, we would seek all the optimizations we could get from all layers of the systems stack. Some noteworthy examples in this direction include: clever management of ancilla qubit allocations and reclamations on a resource-constrained machine, scalable pulse compilation and verification using quantum optimal control theory, and improved methodology for simulating realistic noise channels.